The blue ocean of semiconductor IP is coming. Who can win the new throne?

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At present, the semiconductor industry has entered the post-Moore era, and it is difficult for the manufacturing process to double the number of transistors on the chip every two years as in the past 30 years. In recent years, the evolution speed of the manufacturing nodes has slowed significantly, and the increase of the number of transistors has become increasingly difficult. In this case, if we want to improve chip performance and control power consumption and cost, we cannot limit ourselves to the improvement of the traditional process technology. We must think of new methods, such as advanced Die, bus and packaging technology, which put forward higher requirements for the type, quantity and innovation of IP. At this time, IP plays a more prominent role in the industry.
Because of this, in recent years, the global semiconductor IP market has shown a rapid development trend, and the growth of various types of IP is accelerating. By product type, semiconductor IP can be roughly divided into processor IP, interface IP, physical IP and digital IP. Among them, processor IP is the largest category in the market, while interface IP is the fastest growing category.
Interface IP includes wired interface IP and wireless interface IP: wired interface IP includes USB, PCIe, DDR, SATA, D2D (Die to Die), etc. USB, DDR, PCIe, MIPI and Ethernet IP are widely used; Wireless interface IP mainly includes Bluetooth, Zigbee, Thread, etc. Wired interface IP accounts for 95% of the total interface IP market share.
According to IPnest statistics, all kinds of interface IP generated $1.3 billion in revenue in 2021, up 22.7% year on year, mainly due to PCIe, DDR memory controller and Ethernet/SerDes. IPnest predicts that the market size of interface IP will reach US $3 billion in 2026.
In the past 15 years, the main driving force of the IP market is smart phones. In this process, IP manufacturers such as Arm and Imaging are the biggest beneficiaries. In recent years, the HPC market, represented by data-centric technology, has been booming, and more demands have been put forward for DDR memory controllers (DDR5, LPDDR5, HBM), PCIe, CXL and Ethernet/SerDes. At this time, manufacturers that mainly provide wired interface IP have become new growth engines, and Synopsys and Alphawave are typical representative enterprises.
The figure below shows the ranking of IP suppliers by license (LICENSE) revenue given by IPnest.
It can be seen from the figure that Synopsys is the first winner of IP license revenue, with a market share of 31.2% in 2021, while ARM ranks second with a market share of 25.6% (ARM’s main revenue source is royalties, with a market share of more than 60%).
The market share of Synopsys is closely related to the company’s key investment in wired interfaces. Synopsys accounts for 55.6% of the high-performance SerDes market, and this type of IP is an important pillar of the wired high-speed interconnection market. The company supports almost all protocols (USB, PCIe, Ethernet, SATA, HDMI, MIPI, DDR memory controller, etc.), and is in a leading position in each protocol IP market.
It is somewhat surprising that Alphawave ranks fourth, after Cadence, showing the importance of high-performance SerDes IP for the current data center application as the main market driver. At present, Alphawave is an important supplier of PAM4 112G SerDes IP required for 7nm, 5nm and 3nm of top wafer foundries such as TSMC, Samsung and Intel IFS.
Alphawave was founded by SerDes expert team in 2017, developed PAM4 112G based on DSP, and created IP revenue of US $89 million in 2021, up 102% year on year and 75% year on year in 2020. The key to the company’s success is to aim at cutting-edge protocols and technology nodes, which play an increasingly important role in the computing and storage of data centers, as well as the application of interconnection through PCIe, CXL and other protocols. It can be said that Alphawave appeared in the right place at the right time, combined with the long-term experience of the company’s team in SerDes design, has achieved such performance.
Interface IP and Chiplet complement each other
As mentioned above, in order to continue Moore’s Law further, the interface IP will play an increasingly important role. At present, the chiplet will be an important engine to promote the development of related IP. Especially in the layout of the D2D interface of the chiplet, it needs not only the support capability of advanced processes, but also the understanding of isomerism, and can integrate Dies of various processes such as 28nm, 16nm, 7nm, 5nm. This requires the ability to develop interfaces on both sides of the chiplet architecture. Its requirements for bandwidth and delay are much higher than those of traditional interface IP. Not only that, we need to have a deep understanding of the process and packaging to design the chiplet. All these add up to a huge workload, especially in the field of verification, which requires much more energy, manpower and related resources than traditional design schemes.
In addition, the design of chiplet also involves protocol issues. Because chiplet is a new thing, it is still in the exploratory stage. The relevant protocols have not been finalized. Each company has its own methods, such as Intel’s AIB, Co-EMIB technology, AMD’s Infinity Fabric On Package (IFOP) interface and MCM chiplet technology, replacing the traditional single chip with 7nm Core Die and 14nm IO Die. From the above two technical solutions, it can be seen intuitively that the chiplet is closely related to the packaging technology, which further increases the design complexity of the relevant interface IP. Because of this, it is necessary for IP suppliers to strengthen cooperation with downstream wafer foundry and packaging and testing plants.
China’s IP market has great potential
The data of IPnest shows that the global interface IP market has a compound annual growth rate of 16% from the past five years to the next five years, while the growth rate of the Chinese market is higher. Although the interface IP market has a broad prospect and rapid growth, the self-sufficiency rate of the Chinese market is less than 10%. In the future, China’s local IP enterprises have great prospects.
In the past two years, there have been major problems in the Sino-US trade relations. The high-end chips that China needs to import have been “blocked”, and the semiconductor IP at the upstream of the industrial chain is the key object of American supervision. It is increasingly difficult to import high-end IP into the Chinese market. Take Synopsys as an example, many IP products can no longer be provided to Chinese local customers as before, such as Huawei HiSilicon, The domestic IP shortage is highlighted in this situation. In the face of such a situation, many Chinese semiconductor IP people working in foreign enterprises are not happy in their hearts and have returned to join or create local IP enterprises.
In the future, Chinese local IP enterprises need to further sink their minds and not be lonely to focus on high-end, especially high-speed interface IP research and development. In addition, an important reason why the domestic industry has not improved is that the relevant products and patents have been monopolized by major international manufacturers (90% of the high-end IP in the Chinese market is controlled by major foreign manufacturers). In this case, if the Chinese semiconductor IP people have not come forward, the situation that China’s high-end IP products lack iteration opportunities will continue forever. In that case, the industry will be difficult to develop.
In recent years, international trade restrictions have stimulated the development momentum of China’s local semiconductor IP enterprises, while a number of new forces have also emerged. In the field of interface IP, China’s local representative enterprises mainly include Core Yaohui, Core Power Technology, Ruicheng Core Micro, Nano Micro, Niuxin, Hexin Micro, Core Siyuan, Canxin, etc.
As mentioned earlier, high-speed SerDes interface IP has become the key of HPC applications represented by data centers. The representative enterprise in China in this field is Core Technology, which can provide 16/32/56/64Gbps multi-standard SerDes solutions, 25G/32Gbps SerDes has been mass produced, and 56Gbps SerDes has been released; Another manufacturer, Niuxin Semiconductor, launched 25/28/32Gbps SerDes IP; Canyon and Hexin Microelectronics can provide 1.25Gbps – 12.5Gbps multi-rate SerDes IP. In addition, Ruicheng Microelectronics and Nano Microelectronics also have various SerDes IP products.
In terms of interface IP related to Chiplet, Microelectronics and Microelectronics have launched relevant products. Siyuan is one of the first enterprises in Chinese Mainland to join the UCIe industrial alliance. The company launched a high-end application processor platform based on the design of the chiplet architecture. The 12nm SoC version of the platform has been streamed and is in the process of iteration of the chiplet version.
In terms of storage interface IP, taking DDR interface as an example, DDR PHY and memory controller are the key to ensure data transmission between SoC and DRAM. With the continuous improvement of speed, the design difficulty of DDR module also increases, and the dependence of IC design enterprises on related IP increases. Among China’s DDR IP suppliers, the coverage of the core technology is wide, and the speed it can support has reached a high level.
Yaohui, a new force of local IP in China, is concentrating on the research and development of 28nm/14nm/12nm and more advanced process IP. The company has also developed DDR PHY IP products. It is not clear what DDR applications it can support. At present, Xin Yaohui is tackling the technical bottleneck of DDR PHY from four aspects: reliable SI (signal integrity) and PI (power integrity) analysis, high reliability training design, high performance DDR IO design and fast multi-frequency switching.
In addition, Canxin and Niuxin Semiconductor are also important forces of China’s local DDR IP.
In the macro world, the interconnection of all things has become the consensus of the global IT community, while in the integrated circuit level, a micro “interconnection of all things” world is being formed, that is, on a chip, or in a high-density packaging module similar to a chip, there are more and more functional blocks to be carried, which is the result of the combination of application requirements and technological development.
Due to the heterogeneity of integrated circuits, the number of components is increasing, and the connection requirements between components are becoming more urgent. Traditional methods and technologies have been unable to meet the requirements of such a large number of high-speed connections. This provides more development opportunities for semiconductor IP manufacturers, of which interface IP is the most important.
Traditionally, processor IP is the largest branch of the entire IP market, but with the rise of heterogeneous computing, various interface IPs have ushered in new development opportunities. This is a blue ocean. Anyone who can see the development direction and seize the opportunity is expected to achieve rapid development in a relatively short time as long as he finds the right breakthrough. The Alphawave mentioned above is to seize the window period of the development of the data center SerDes, In a short time, the market share reached the top four in the industry. I believe there will be more and more similar things in the future.

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