We know that chips are made up of transistors, such as Apple’s A16, which has 16 billion transistors. The current inside the transistor will flow from the beginning (source) to the end (drain).
In the process of current flowing, it will pass through a gate (gate), and the width of the gate is exactly what is usually called the chip process, that is, XXnm. For example, the Apple A16 is a 4nm process, and the width of the gate is theoretically 4nm. .
In addition to the EUV lithography machine, the manufacture of 2nm chips also needs a microwave oven?
To improve the chip process, such as from 4nm to 3nm, and then from 3nm to 2nm, the width of the gate must be shortened.
And the width of the gate is small, so the distance between the source and the drain is short. The consequence of this is that the electric field of the source and drain electrodes interferes with the gate, and then the gate’s ability to control the current is greatly reduced, and finally the chip is unstable, leakage, increased power consumption, performance degradation, etc…
In the past at 7nm, 5nm, and 3nm, this situation could be controlled slightly, so that it would not have a major impact, but at 2nm, it cannot be controlled, and further technological improvements are necessary.
How to reduce the interference of the electric field of the source and drain electrodes to the gate while shortening the gate width? That is to change the characteristics of the material to make the gate more stable.
In addition to the EUV lithography machine, the manufacture of 2nm chips also needs a microwave oven?
Manufacturers such as TSMC have tried many methods before, such as doping phosphorus atoms in the chip material, and then heating and annealing the mixture to increase the equilibrium concentration of phosphorus atoms, activate the activity, and improve the conductivity.
But at present, this technology has also encountered some difficulties. The ordinary doping process is not good, the equilibrium concentration of phosphorus atoms is not high enough to meet the requirements, and the transistor may expand during heating and annealing.
So recently, researchers at Cornell University proposed a new method to increase the equilibrium concentration of phosphorus: microwave technology.
During the experiment, the researchers put the chip doped with phosphorus atoms into an improved microwave oven at home for testing, and found that microwave technology can activate the dopant atoms in the chip material without transistor expansion. situation.
In addition to the EUV lithography machine, the manufacture of 2nm chips also needs a microwave oven?
At present, James Hwang of Cornell University and postdoctoral fellow Gianluca Fabi (Gianluca Fabi) have jointly applied for two patents on microwave annealers, and related papers have been published in Applied Physics Letters.
Researchers predict that this technology will be applied to chip manufacturing by 2025.
In 2025, TSMC and Samsung’s 2nm chips may be mass-produced, so that is to say, the manufacture of 2nm chips may require a microwave oven in addition to EUV lithography.